English translation for "bus arbitration"
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- 判优总线
总线判优 总线仲裁
Related Translations:
bus: n.(pl. busses, buses)1.公共马车;公共汽车;客机。2.〔口语〕汽车,机器脚踏车;飞机。3.【电学】信息转移通路;悔流条,母线。4.〔美俚〕(小餐馆等的)服务员(= bus boy).5.〔美俚〕火箭[飞弹]的一级。6.【计算机】(电脑的)总线。 a double-decker bus双层公共汽车。 get a bus乘公共汽车。 miss the bu
- Example Sentences:
| 1. | The scheduling policy of the bus arbitration unit was been analyzed and the i / o function of rtos was partly implemented in hardware 本文在分析总线仲裁单元的时间片调度的基础上,将操作系统的i o管理的功能部分采用硬件实现。 | | 2. | 3 . realize the interface between pci9054 and the pci bus , including the bus arbitration , read and write of the registers , the configuration of the eeprom , the dma transfer , interrupt response and so on 3 .实现pci9054与计算机pci总线的接口,包括总线仲裁,寄存器读写操作, eeprom的配置和下载, dma传输,中断响应等功能。 | | 3. | The bue can has the functions of in polysleeve way , non - destructive bus arbitration technigue , super - strong - error measurement and high communication rate etc . which have been widely used in the various low cost , high anti - interference multi - machine systems Can总线以其多主方式、非破坏性总线仲裁技术、超强错误检测和高通信速率等功能在各种低成本、高抗干扰的多机系统中得到了广泛应用。 | | 4. | Emphatically introduce the can communication protocol in user layer based on multi - host competition and bus arbitration , and state the distribute software mechanism which applies the vxd ( virtual x device ) technology which work in ringo of the windows operation system to realize the real - time control of the robotic excavator 着重阐述了基于多主竞争和总线仲裁的命令加参数的can高层通信协议的制定和为实现机器人实时控制而采用的以vxd (虚拟设备驱动程序)为核心的分层分布式软件体系结构。 4 、展示挖掘机器人分布式控制系统的运行状况。 | | 5. | Especially , the idea of constructing cycle fifo in the design of reading / writing of ip core is put forward and implemented ; in the design of pci bus arbitration mechanism , in order to overcome the regular pri algorithm " full and hungry uneven drawback " , a pci arbitrate algorithm based on rotational pri is proposed and implemented which can support six pci devices ' s bus arbitration 其中,在ip核的读/写fifo设计中,提出构建循环fifo行的思想,并进行了实现;在pci总线仲裁机制设计中,为了克服固定优先级算法“饱饿”不均的弊端,提出并实现了一种基于循环优先级的pci仲裁算法,该算法能够支持六个pci设备的总线仲裁。 | | 6. | During the design of vxi - bus serial controller module , the functions of vxi - bus including time - sequence for vxi interface , resource management , interrupt process , bus arbitration , are accomplished . to advance the performance and stability , the fpga technic is used to implement the kerneled code including serial bus time - sequence switching to vxi interface time - sequence , the uart , the parameterized baud generator and “ pipeling frame ” . the handle type of data transfer bus for vxi - bus is researched thoroughly , and the format of serial data transfer is designed 在vxi总线串行控制器设计中,实现了vxi总线控制器的基本功能,包括vxi总线接口时序、总线仲裁、超时处理等;同时利用先进的fpga技术实现了串行总线时序向vxi总线时序的转换、通用异步收发器( uart ) 、参数化波特率发生器、流水线结构等功能模块;在设计中还深入研究了vxi总线数据传输的各种操作类型,制定了串行数据传输的编码格式。 |
- Similar Words:
- "bus amplifier" English translation, "bus analog summing" English translation, "bus and coach" English translation, "bus arbiter" English translation, "bus arbiter chip" English translation, "bus architecture" English translation, "bus asynchronous memory" English translation, "bus availability rate" English translation, "bus available" English translation, "bus available signal" English translation
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